![]() ![]() Stm32f4x errata detected - fixing incorrect MCU_IDCODEĬleared protection for sectors 0 through 11 on flash bank 0 Target halted due to debug-request, current mode: Thread Target was in unknown state when halt was requested Where are this config files have to be and what I have to write to it?ĥ) OpenOCD install directory is /usr/local/bin/openocd - something I can do right :)Ħ) If I want to FLESH AND DEBUG it outputs this: Runtime Error: embedded:startup.tcl:47: Can't find openocd.cfgĮrror: Debug Adapter has to be specified, see "interface" command Requesting target halt and executing a soft reset" Deleteģ) My interface is unknown. Set protection for sectors 0 through # on flash bank 0 "wrote # bytes from file bin/bareCortexM.elf in #s (# KiB/s) By default, it says "/usr/local/bin/openocd", does it match your installation path?Ģ.- If OpenODC succeeds, then launch the debug session. + Check the OpenOCD location in (Menu > External Tools > External Tools Configuration) -> (Program > OpenOCD) -> (Main tab). + Open your command line and try the command "openocd". + Which board, device, JTAG interface are you using? In case you don't see that message, please post here the following information: If you DON'T see that message, then probably there is an error with your OpenOCD setup. "Info : stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints" You need to launch OpenOCD BEFORE launching the Debug Session:ġ.- Menu > Run > External Tools > OpenOCD. Then check if you are actually getting better performance on the AHB bus peripherals. ![]() ![]() After everything works fine, try increasing the clock and try different values for the latency until you get something stable. My recommendation: Stick to 42 MHz max with zero latency while developing your application. FPU operations) and program jumps (due to functions and interrupts), calculating the "real" operating frequency gets really hard. However, when you take in consideration that instructions can take more than one cycle (e.g. NOTE: 84 MHz and latency one SHOULD be equivalent to 42 MHz, since the uC will execute one instruction and wait one cycle before executing the next instruction. Some WTFs when using interrupts and enabling optimization. From my observations the following latencies work well: NOTE: As far as I know, the STM32F4 devices from the revision "A" can't use the ART accelerator (see the errata sheet here), for these devices the LATENCY parameter is important when configuring the clock. ![]()
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